How many SoC/ASICS’s will be available for H.265/HEVC encoding for professional market?

We think far fewer H.265/HEVC silicon solutions will be created compared to previous generation H.264/AVC encoders. The reasons are to do with economics:

  • Costs to create an SoC have increased significantly on advanced process nodes

  • H.265/HEVC is significantly more complex than H.264/AVC (more cost)

  • VC funding for Semiconductor startups has been greatly reduced (less money)

Below is a graph from Semico Research Corp. published 3/13 on the costs of designing an SoC.


It shows that for a 28nm tapeout the total cost for the semiconductor is $100M! Unfortunately the professional broadcasting markets which require H.265 has a limited volume, selling just 10's K units or less. Thus the semiconductor vendors have to focus on the high volume consumer markets. So the first SoC with H.265 encoding will be targeted at consumer markets like smartphones. It is highly unlikely these encoder will have the correct capabilities for professional markets. In addition the opportunity cost of supporting low volume professional markets is too high. Professional markets could support much higher ASP (e.g. $1000) but we expect very few customers to be able to have access to  these consumer SoCs, this may lead to some of them scrambling to have a solution, leading to a whole on their product portfolio.

Our recommendation is to use a SoC FPGA like the Zynq family from Xilinx. The Zynq part are a programmable SoC. They include a hard ARM based CPU subsystem, plus FPGA fabric. In time Xilinx may include a hard video encoder block with the CPU subsystem, which will allow a significant reduction in ASP and power consumption. Given that the professional markets might require H.265/HEVC version 2 (or v3) with range extensions, with the cost and complexity: we don’t expect to see these SoCs until 2016-2017.

H.265/HEVC is about 3 to 5 times the complexity of H.264/AVC. The range depends on the compression efficiency you are targeting. In addition the resolution is likely 4 times larger. Together the size of the team required to create a hardware encoder could be around 20 engineers. Although tools and computers have got better this is still significantly larger than in the past with H.264/AVC, it is now very difficult to deliver this encoder is house with a competitive performance.

In the past many VCs invested in semiconductor startups. Today nearly no VCs is investing in initial semiconductor startups. The graph below shows this trend:


As a result H.265/HEVC hardware solutions most likely will have to come from one of the established suppliers. Without the competition from startups it is possible that there will be only one solution for the professional markets.

Again our recommendation is not to wait but use a Xilinx FPGA and start working on a solution to avoid not having a product in the near future (the risk is high).

BlogOliver Gunasekara