Location: Silicon Valley or Toronto or Waterloo

We're a well funded community of builders - engineers, designers, and entrepreneurs - who love what we do. We are looking for people who share our passion, our drive, our commitment and our abilities. NGCodec is working on the next generation of video compression and we have a $Billion plan to change how the internet uses video. Come join our journey.

The person filling this position will play a significant role in implementing our second encoder product.  He/She will be required to engage in diverse activities including C/C++ modeling, HLS (High Level Synthesis), microarchitecture, RTL design, documentation, synthesis for ASIC and FPGA, and verification.  The primary goal is to move our encoder bit accurate C++ model to a hardware implementation.

Responsibilities:

  • Define module level microarchitecture to move our C++ encoder model to a HW implementation

  • Write HLS C++ code (as opposed to RTL) to implement the hardware design

  • In areas where HLS is inappropriate, code Verilog RTL

  • Synthesize, test and debug hardware on FPGA platform

 

Required Skills and Experience:

  • BSEE, MSEE with at least 10 years experience, including multiple chip design projects from inception to tape-out.

  • Experience in defining and implementing a hardware design starting from a written spec and/or software model

  • Expert Verilog RTL designer

  • Proficient C/C++ coder with recent programming experience

 

Desirable Additional Experience:

  • Experience with video encoding and decoding, especially H.264 or H.265

  • Experience with High Level Synthesis

  • Experience with Xilinx or Altera FPGAs, and synthesizing and implementing designs on FPGAs

  • System Verilog and SystemVerilog Assertions