RealityCodec H.265/HEVC Low Delay (I&P) Encoder
RealityCodec™ is a low delay H.265/HEVC encoder IP core for soft FPGA implementations. It is built with Xilinx® Vivado® High Level Synthesis (HLS) and targets Xilinx FPGAs. It affords users a lower power, cost-effective video encoding solution suitable for surveillance, medical, broadcast, enterprise, telepresence, cloud computing, and government applications. Unlike comparable ASSP/ASIC designs, RealityCodec supports sub-frame latency and offers the flexibility to update the design in the field as emerging capabilities and differentiation require.
- Bit-rate: 50% reduction at same quality vs H.264
- Latency: Sub-frame rate control
- Full-HD 1080p60 in 50% of Xilinx KU060
- Programmability: Fully programmable for enhancements and improvements over time
- Differentiation: NGCodec or the customer can add new functionality and capabilities
- Resolution and frame rate up to 2160p30 (4K)
- 2 simultaneously independent encoded streams
- Programmable latency of <1 frame to 4 seconds
- Host API interface for application level integration
- 4:2:0 8-bit and 10-bit
- I- and P-frames (B-frame capability coming soon)
- Interlaced support
RealityCodec H.265/HEVC is available in three configurations with scalable pricing to meet the needs of today’s broad video market. Our expert engineers would be pleased to guide you in selecting the option that is best suited to your project. Contact us today.